One CPU Kept Up With 408 Logical Qubits in IonQ's Tests

IonQ said on 22 September 2026 that its researchers had built and tested what it describes as the first end-to-end real-time quantum error correction decoder capable of running on a single standard off-the-shelf central processing unit. The claim rests on a preprint, arXiv:2608.25027, titled 'Real-time decoder for a MegaQuOp quantum computer using a single CPU', by Min Ye, Andrii Maksymov and Nicolas Delfosse. It was first posted on 25 August 2026 and revised on 3 September.

Decoding is the classical half of quantum error correction. Physical qubits pick up errors from their environment, and a classical computer must read the resulting syndrome data and work out what went wrong faster than new errors arrive. If it cannot keep up, the quantum processor waits. Teams have generally solved this with FPGA or GPU clusters.

The paper's pipeline covers on-the-fly detector error model generation, decoding of all logical qubits, logical operations and magic-state factories, and the authors report benchmarking it on quantum applications spanning up to 408 logical qubits and up to one million T gates.

Which overhead figure

IonQ's announcement states that under standard operational noise the decoder introduced as little as 0.02% stretch time, meaning near-zero added delay. The abstract of the paper the company links to gives different numbers. Assuming a trapped-ion architecture with a 1 to 5 millisecond cycle time, the authors write that the decoding delay stretches the computation by less than 0.3% at a two-qubit gate error rate of 10 to the minus 4, and by less than 12% at 5 times 10 to the minus 4, for all workloads studied. The press release quotes the best case; the paper states the bounds, and the worse of the two error rates costs roughly an eighth of the runtime.

A real processor, simulated qubits

The distinction that matters is which half of the system was physical. The decoder ran on actual classical hardware and its timing is a measured result. The 408 logical qubits, the 88 memory blocks and the magic-state factories were simulated, because no machine in existence can supply them. IonQ's own release describes the work as establishing a foundation for a roadmap that goes beyond 256 physical qubits toward platforms controlling thousands. Error-corrected logical qubits consume many physical qubits each, so 408 of them sits well past anything IonQ has built.

The result belongs to a pattern Parallax Nexus has followed in physics, where computational design work increasingly sets the pace of what experimentalists can attempt rather than merely analysing what they have already done.

The preprint has not been peer reviewed. Its second version corrected a description of the simulated Heisenberg Hamiltonian, which is defined on a degree-three random regular graph rather than the degree-seven graph stated in the first version, and added detail on logical frame tracking, inter-block logical measurements and the simulation of magic-state factories. IonQ shares rose about 7% in after-hours trading on Tuesday following the announcement, according to Investing.com.

The honest reading is that this is a real and useful negative result dressed as a positive one: it shows that classical decoding does not have to scale exponentially with the width or depth of a fault-tolerant computation, which removes a cost line that some roadmaps had assumed. It does not move any qubit count forward. The question the paper answers is whether the control electronics become the bottleneck, and the answer is that for trapped-ion cycle times of milliseconds they need not.

What is not known is how the same decoder behaves on superconducting architectures, where cycle times are microseconds rather than milliseconds and the classical budget is a thousand times tighter. The paper's margin comes substantially from the slowness of trapped ions, and IonQ does not claim otherwise.